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FS8S0765RCB
Features
Fairchild Power Switch(FPS)
Description
FS8S0765RCB is a Fairchild Power Switch (FPS) that is specially designed for off-line SMPS of CRT monitor with minimal external components. This device is a current mode PWM controller combined with a high voltage power SenseFET in a single package. The PWM controller features integrated oscillator to be synchronized with the external sync signal, under voltage lockout, optimized gate driver and temperature compensated precise current sources for the loop compensation. This device also includes various fault protection circuits such as over voltage protection, over load protection, abnormal over current protection and over temperature protection. Compared with discrete MOSFET and PWM controller solution, FPS can reduce total cost, component count, size and weight simultaneously increasing efficiency, productivity and system reliability. This device is well suited for the cost effective monitor power supply.
TO-220-5L
* Burst Mode Operation to Reduce the Power Consumption in the Standby Mode * External pin for Synchronization and Soft Start * Wide Operating Frequency Range up to 150kHz * Low Start-up Current (Max:80uA) * Low Operating Current (Max:15mA) * Pulse by Pulse Current Limiting * Over Voltage Protection (Auto Restart Mode) * Over Load Protection (Auto Restart Mode) * Abnormal Over Current Protection (Auto Restart Mode) * Internal Thermal Shutdown (Auto Restart Mode) * Under Voltage Lockout * Internal High Voltage SenseFET
Application
* Monitor SMPS
1
1. Drain 2. GND 3. VCC 4. Feedback 5. Sync
Internal Block Diagram
Vcc 3
Vref
Drain 1
Vcc good Soft start 5 & Sync
Burst Mode Detector Vfb<0.8V Vss>3V No sync
Vref
Burst Mode Controller
9V/15V
Sync Detector
Vref OSC
Internal Bias
Vcc Idelay
Vref IFB
PWM 2.5R R
S
Q
FB
4
R
Q
Gate driver
LEB V SD Vcc
S Q
Vovp TSD
UVLO Reset (Vcc<9V)
R Q
2 GND AOCP Vocl
Rev.1.0.1
(c)2003 Fairchild Semiconductor Corporation
FS8S0765RCB
Pin Definitions
Pin Number 1 2 3 Pin Name Drain GND Vcc Pin Function Description High voltage power SenseFET drain connection. This pin is designed to drive the transformer directly. This pin is the control ground and the SenseFET source. This pin is the positive supply input. This pin provides internal operating current for both start-up and steady-state operation. This pin is internally connected to the inverting input of the PWM comparator. For stable operation, a capacitor should be placed between this pin and GND. If the voltage of this pin reaches 7.5V, the over load protection is activated resulting in shutdown of FPS. This pin is for soft start and synchronization to the external sync signal.
4
Feedback Soft Start & Sync
5
2
FS8S0765RCB
Absolute Maximum Ratings
(Ta=25C, unless otherwise specified) Parameter Drain-Gate Voltage (RGS=1M) Gate-Source (GND) Voltage Drain Current Pulsed
(2) (3)
Symbol VDGR VGS IDM EAS IAS ID ID VCC VFB VS_S PD(Watt H/S) Derating Tj TA TSTG
Value 650 30 28 370 17 7 4.5 35 -0.3 to Vcc -0.3 to 10 145 1.16 +150 -25 to +85 -55 to +150
Unit V V ADC mJ A ADC ADC V V V W W/C C C C
Single Pulsed Avalanche Energy
Single Pulsed Avalanche Current (4) Continuous Drain Current (Tc = 25C) Continuous Drain Current (TC=100C) Supply Voltage Input Voltage Range Total Power Dissipation Operating Junction Temperature Operating Ambient Temperature Storage Temperature Range
Notes: 1. Tj=25C to 150C 2. Repetitive rating: Pulse width limited by maximum junction temperature 3. L=14mH, starting Tj=25C 4. L=13uH, starting Tj=25C
3
FS8S0765RCB
Electrical Characteristics (SenseFET part)
(Ta=25C unless otherwise specified) Parameter Drain Source Breakdown Voltage Zero Gate Voltage Drain Current Static Drain Source On Resistance (1) Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn On Delay Time Rise Time Turn Off Delay Time Fall Time Total Gate Charge (Gate-Source+Gate-Drain) Gate-Source Charge Gate-Drain (Miller) Charge
Note: (1) Pulse test : Pulse width 300S, duty 2%
Symbol BVDSS IDSS RDS(ON) gfs Ciss Coss Crss td(on) tr td(off) tf Qg Qgs Qgd
Condition VGS=0V, ID=250A VDS=650V, VGS=0V VDS=520V VGS=0V, TC=125C VGS=10V, ID=3.5A VDS=40V, ID=3.5A VGS=0V, VDS=25V, f = 1MHz VDD=325V, ID=6.5A (MOSFET switching time is essentially independent of operating temperature) VGS=10V, ID=6.5A, VDS=325V (MOSFET switching time is essentially independent of operating temperature)
Min. 650 -
Typ. 1.4 8 1415 100 15 25 60 115 65 40 7 12
Max. 200 300 1.6 -
Unit V A A
mho pF
nS
nC
4
FS8S0765RCB
Electrical Characteristics (Continued)
(Ta=25C unless otherwise specified) Parameter UVLO SECTION Start Threshold Voltage Stop Threshold Voltage OSCILLATOR SECTION Initial Frequency Voltage Stability Temperature Stability (1) Maximum Duty Cycle Minimum Duty Cycle FEEDBACK SECTION Feedback Source Current Feedback Sink Current Shutdown Feedback Voltage Shutdown Delay Current PROTECTION SECTION Over Voltage Protection Over Current Latch Voltage (2) Thermal Shutdown Temp.(1) SYNC & SOFTSTART SECTION Softstart Vortage Softstart Current Sync High Threshold Voltage Sync Low Threshold Voltage VSS ISS VSH VSL Vfb=2 Vss=0V Vcc=16V,Vfb=5V Vcc=16V,Vfb=5V 4.7 0.8 6.7 5.4 5.0 1.0 7.2 5.8 5.3 1.2 7.9 6.2 V mA V V VOVP VOCL TSD Vcc 27V 34 0.95 140 37 1.0 160 1.05 V V C IFBSO IFBSI VSD Idelay VFB=GND VFB=4V,VCC=19V Vfb 6.9V VFB=5V 0.7 2.4 6.9 1.6 0.9 3.0 7.5 2.0 1.1 3.6 8.1 2.4 mA mA V A FOSC FSTABLE FOSC DMAX DMIN 12V Vcc 23V -25C Ta 85C 18 0 0 92 20 1 5 95 22 3 10 98 0 kHz % % % % VSTART VSTOP VFB=GND VFB=GND 14 8 15 9 16 10 V V Symbol Condition Min. Typ. Max. Unit
Note: 1. These parameters, although guaranteed at the design, are not tested in mass production. 2. These parameters, although guaranteed, are tested in EDS(wafer test) process.
5
FS8S0765RCB
Electrical Characteristics(Continued)
Parameter BURST MODESECTION(DPMS MODE) Burst Mode High Threshold Voltage Burst Mode Low Threshold Voltage Burst Mode Enable FB Voltage Burst Mode Enable S_S Voltage Burst Mode Enable Delay Time Burst Mode Frequency Peak Current Limit(1) Burst Mode Peak Current Limit TOTAL DEVICE SECTION Start Up Current Operating Supply Current (2) ISTART IOP IOP(MIN) IOP(MAX)
Note: 1. These parameters indicate inductor current. 2. These parameters are the current flowing in the control IC.
Symbol VBUH VBUL VBUFB VBUSS TBUDT FBU IOVER IBU_PK Vfb=0V Vfb=0V
Condition
Min. Typ. Max. Unit 11.6 10.6 0.9 2.5 32 3.52 0.45 12 11 1.0 3.0 0.5 40 4.0 0.6 40 9 12.6 11.6 1.1 3.5 48 4.48 0.75 80 15 V V V V ms kHz A A uA mA
Vcc=10.5V Vcc=10.5V,Vfb=0V Vcc=10.5V,Vfb=0V Vcc=10.5V,Vfb=0V VCC=Vstart-0.1V Vfb=GND, VCC=16V Vfb=GND, VCC=12V Vfb=GND, VCC=27V
CURRENT LIMIT(SELF-PROTECTION)SECTION
6
FS8S0765RCB
Typical Performance Characteristics
(These characteristic graphs are normalized at Ta= 25C)
Start Up Current VS Temp.
1.20 1.15
Normalized to 25
Operating Supply Current VS Temp.
1.20 1.15 Normalized to 25 1.10 1.05 1.00 0.95 0.90 0.85
1.10 1.05 1.00 0.95 0.90 0.85 0.80 -40 -20 0 20 40 60 80 100 120 140 160
0.80 -40
-20
0
20
40
60
80
100 120 140 160
Temperature[ ]
Temperature[ ]
Figure 1. Start Up Current vs. Temp.
Figure 2. Operating Supply Current vs. Temp.
Start Threshold Voltage VS Temp.
1.20 1.15 Normalized to 25
Stop Threshold Voltage VS Temp.
1.20 1.15
Normalized to 25
1.10 1.05 1.00 0.95 0.90 0.85 0.80 -40 -20 0 20 40 60 80 100 120 140 160
1.10 1.05 1.00 0.95 0.90 0.85 0.80 -40 -20 0 20 40 60 80 100 120 140 160
Temperature[ ]
Temperature[ ]
Figure 3. Start Threshold Voltage vs. Temp.
Figure 4. Stop Threshold Voltage vs. Temp.
Initial Freqency VS Temp.
1.20 1.15
Maximum Duty Cycle VS Temp.
1.20 1.15 Normalized to 25 1.10 1.05 1.00 0.95 0.90 0.85
Normalized to 25
1.10 1.05 1.00 0.95 0.90 0.85 0.80 -40 -20 0 20 40 60 80 100 120 140 160
0.80 -40
-20
0
20
Temperature[ ]
40 60 80 100 120 140 160 Temperature[ ]
Figure 5. Initial Freqency vs. Temp.
Figure 6. Maximum Duty Cycle vs. Temp.
7
FS8S0765RCB
Typical Performance Characteristics(Continued)
(These characteristic graphs are normalized at Ta= 25C)
Feedback Offset Voltage VS Temp.
1.7 1.6 1.5 1.4 1.3 1.2 1.1 1.0 0.9 0.8 0.7 0.6 0.5 -40
Feedback Sink Current VS Temp.
1.20 1.15 Normalized to 25 1.10 1.05 1.00 0.95 0.90 0.85
Normalized to 25
-20
0
20
40
60
80
100 120 140 160
0.80 -40
-20
0
20
40
60
80
100 120 140 160
Temperature[ ]
Temperature[ ]
Figure 7. Feedback Offset Voltage vs. Temp.
Figure 8. Feedback Sink Current vs. Temp.
Shutdown Delay Current VS Temp.
1.20 1.15 Normalized to 25
Shutdown Feedback Voltage VS Temp.
1.20 1.15 Normalized to 25 1.10 1.05 1.00 0.95 0.90 0.85
1.10 1.05 1.00 0.95 0.90 0.85 0.80 -40 -20 0 20 40 60 80 100 120 140 160
0.80 -40
-20
0
20
40
60
80
100 120 140 160
Temperature[ ]
Temperature[ ]
Figure 9. Shutdown Delay Current vs. Temp.
Figure 10. Shutdown Feedback Voltage vs. Temp.
SoftStart Voltage VS Temp.
1.20 1.15
Over Voltage Protection VS Temp.
1.20 1.15 Normalized to 25 1.10 1.05 1.00 0.95 0.90 0.85
Normalized to 25
1.10 1.05 1.00 0.95 0.90 0.85 0.80 -40 -20 0 20 40 60 80 100 120 140 160
0.80 -40
-20
0
20
40
60
80
100 120 140 160
Temperature[ ]
Temperature[]
Figure 11. Soft Start Voltage vs. Temp.
Figure 12. Over Voltage Protection vs. Temp.
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FS8S0765RCB
Typical Performance Characteristics(Continued)
(These characteristic graphs are normalized at Ta= 25C)
Normal Mode Regulation Voltage VS Temp.
1.20 1.15 Normalized to 25
Peak Current Limit VS Temp.
1.20 1.15 Normalized to 25 1.10 1.05 1.00 0.95 0.90 0.85
1.10 1.05 1.00 0.95 0.90 0.85 0.80 -40 -20 0 20 40 60 80 100 120 140 160
0.80 -40
-20
0
20
40
60
80
100 120 140 160
Temperature[ ]
Temperature[ ]
Figure 13. Normal Mode Regulation Voltage vs. Temp.
Figure 14. Peak Current vs. Temp.
Feedback Sink Current VS Temp.
1.4 1.3
1.20 1.15
Burst Mode Low Threshold Voltage VS Temp.
Normalized to 25
1.2 1.1 1.0 0.9 0.8 -40
Normalized to 25
1.10 1.05 1.00 0.95 0.90 0.85
-20
0
20
40
60
80
100 120 140 160
0.80 -40
-20
0
20
40
60
80
100
120
140
160
Temperature[ ]
Temperature[ ]
Figure 15. Feedback Sink Current vs. Temp.
Figure 16. Burst Mode Low Threshold Voltage vs. Temp.
Burst Mode High Threshold Voltage VS Temp.
1.20 1.15 Normalized to 25 1.10 1.05 1.00 0.95 0.90 0.85 0.80 -40 -20 0 20 40 60 80 100 120 140 160
Normalized to 25 1.20 1.15 1.10 1.05 1.00 0.95 0.90 0.85 0.80 -40
Burst Mode Enable FB Voltage VS Temp.
-20
0
20
40
60
80
100
120
140
160
Temperature[ ]
Temperature[ ]
Figure 17. Burst Mode High Threshold Voltage vs. Temp.
Figure 18. Burst Mode Enable Voltage vs. Temp.
9
FS8S0765RCB
Typical Performance Characteristics(Continued)
(These characteristic graphs are normalized at Ta= 25C)
Burst Mode Peak Current VS Temp.
1.20 1.15
Normalized to 25
1.10 1.05 1.00 0.95 0.90 0.85 0.80 -40 -20 0 20 40 60 80 100 120 140 160
Temperature[ ]
Figure 19. Burst Mode Peak Current vs. Temp.
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FS8S0765RCB
Functional Description
1. Start up : To guarantee stable operation of the control IC, FS8S0765RCB has UVLO circuit with 6V hysteresis band. Figure 1 shows the relation between the supply current (Icc) and the supply voltage (Vcc). Before Vcc reaches 15V, the FPS consumes only startup current of 80A, which is usually provided by the DC link through start-up resistor. When Vcc reaches 15V, the FPS begins operation and the operating current increases to 15mA as shown. Once the control IC starts operation, it continues its normal operation until Vcc goes below the stop voltage of 9V
Icc
3. Protection function : FS8S0765RCB has 4 self protective functions such as abnormal over current protection (AOCP), over load protection (OLP), over voltage protection (OVP) and thermal shutdown (TSD). Because these protection circuits are fully integrated into the IC without external components, the reliability can be improved without cost increase. In the event of these fault conditions, the FPS enters into auto-restart operation. Once the fault condition occurs, switching operation is terminated and MOSFET remains off, which forces Vcc to be reduced. When Vcc reaches 9V, the protection is reset and the supply current reduces to 80 uA. Then, Vcc begin to increase with the current provided through the start-up resistor. When Vcc reaches 15V, the FPS resumes its normal operation if the fault condition is removed. In this manner, the auto-restart alternately enables and disables the switching of the power MOSFET until the fault condition is eliminated as illustrated in figure 3.
Prote c tion is a c tiva te d (O CP,O LP,O VP or T SD)
15mA
V Vds
80uA Vcc Vstop=9V Vstart=15V OVP
Figure 1. Strat up with hysteresis
tim e
V Vcc 15 V 9V
2. Feedback Control : FS8S0765RCB employs primary side regulation, which permits elimination of feedback circuit components in the secondary side such as opto coupler and TL431. Figure 2 shows the primary side control circuit. The primary side regulation voltage (Vpsr) is controlled to the breakdown voltage of zener diode (Dz). Because current mode control is employed, the drain current of the power MOSFET is limited by the inverting input of PWM comparator (Vfb*). When MOSFET turns on, usually there exists high current spike in the MOSFET current caused by primary-side capacitance and secondary-side rectifier reverse recovery. In order to prevent premature termination of the switching pulse due to the current spike, the FPS employs leading edge blanking (LEB). The leading edge blanking circuit inhibits the PWM comparator for a short time after the MOSFET is turned on.
Vcc
Au to re sta rt
tim e
Figure 3. Auto restart operation after protection
3.1 Abnormal Over Current Protection (AOCP) : When the secondary rectifying diodes or the transformer pins are shorted, a steep current with extremely high di/dt can flow during the LEB time. Therefore, the abnormal over current protection (AOCP) block is added to ensure the reliability as shown in figure 4. It turns off the SenseFET within 300ns after the abnormal over current condition is sensed.
V cc 2uA
V ref 0.9m A
OVP OLP S Q' R
G ate driver
O SC
V p sr DZ
V fb
FB 4
C fb
GATE DRIVER
SenseFET
D1
D2 2.5R V fb* R
TSD PWM Comp
UVLO
RZ
V SD
O LP
AOCP COMP. Vsense : 1V
Figure 2. Primary side control circuit Figure 4. AOCP block
11
FS8S0765RCB
3.2 Over Load Protection (OLP) : When the load current exceeds a pre-set level for longer than pre-determined time, protection circuit should be activated in order to protect the SMPS. Because of the pulse-by-pulse current limit capability, the maximum peak current through the SMPS is limited, and therefore the maximum input power is restricted with a given input voltage. If the output consumes beyond this maximum power, the output voltage together with primary side regulation voltage decrease below the set voltage. This reduces the current through primary side regulation transistor, which increases feedback voltage (Vfb). If Vfb exceeds 2.7V, D1 is blocked and the 2uA current source starts to charge Cfb slowly compared to when the 0.9mA current source charges Cfb. In this condition, Vfb continues increasing until it reaches 7.5V, and the switching operation is terminated at that time as shown in figure 6. The delay time for shutdown is the time required to charge Cfb from 2.7V to 7.5V with 2uA.
3.3 Over Voltage Protection (OVP) : In case of malfunction in the primary side feedback circuit, or feedback loop open caused by a defect of solder, the current through primary side control transistor becomes almost zero. Then, Vfb climbs up in a similar manner to the over load situation, forcing the preset maximum current to be supplied to the secondary side until the over load protection is activated. Because energy more than required is provided to the output, the output voltage may exceed the rated voltage before the over load protection is activated, resulting in the breakdown of the devices in the secondary side. In order to prevent this situation, an over voltage protection (OVP) circuit is employed. When the Vcc voltage touches 37V, the OVP block is activated. 3.4 Thermal Shutdown (TSD) : The SenseFET and the control IC are built in one package. This makes it easy for the control IC to detect the heat generation from the SenseFET. When the temperature exceeds approximately 160C, the thermal shutdown is activated. 4. Soft Start : Figure 7 shows the soft start circuit. During the initial start up, the 0.9 mA current source leaks out through Css and Rss. As Css is charged, the leakage current decreases. Therefore, by choosing much bigger Css than Cfb, it is possible to increase the feedback voltage slowly forcing the SenseFET current to increase slowly. After Css reaches its steady state value, D3 is blocked and the soft switching circuit is decoupled from the feedback circuit. If the value of Css is too large, there is possibility that Vfb increases to 7.5V activating the over load protection during soft start time. In order to avoid this situation, it is recommended that the value of Css should not exceed 100 times of Cfb.
V Vds
V 2V 2 1V 5 9 V
Auto restart
tim e
Vcc
tim e
Over load protection
V 7V .5
Vref 50K
Vf b
C ss
5
tim e
Figure 5. The waveforms at the OLP and auto restart
R ss
D3
4
Cfb 2.5R
OSC
PWM COM P.
D S
V FB Over load protection
7.5V
2uA
0.9m A R
G TE A DRIV ER
Voffset
FS8S0765RCB
2.7V
Figure 7. The circuit for the soft start
T 12 = Cfb*(7.5-2.7)/Idelay
T1
T2
t
Figure 6. Over load protection
5. Synchronization : In order to reduce the effect of switching noise on the screen, the SMPS for monitor synchronizes its switching frequency to an external signal, typically the horizontal sync flyback signal. The switching frequency of the FPS can vary from 20 kHz to 150 kHz according to the
12
FS8S0765RCB
external sync signal. The internal sync comparator detects the sync signal and determines the SenseFET turn-on time. The SenseFET is turned on at the negative edge of the sync comparator output. The reference voltage of the sync comparator is an inverted saw tooth with a base frequency of 20kHz and a varying range between 5.8V and 7.2V, as shown in the figure 8. The inverted saw tooth reference gets rid of the excessive switching noise at the first synchronized turn-on. The external sync signal is recommended to have an amplitude higher than 4.2V.
Vref
sumption in standby mode, it is recommended to set the value of Vcc during normal operation as high as possible (about 29V).
V 5V 3V Vsync
V Vfb
SYNC COMP.
Css
5
7.2V
1V V
External Sync
Rss
D3
5.8V
4
Cfb 2.5R
OSC
PWM COMP.
D S
Vds
2uA
0.9mA R
GATE DRIVER
V Vcc
Voffset
FS8S0765RCB
Vcc 15V 12V 11V 9V
Figure 8. The circuit for the synchronization with external sync
Section 4 Section I Section 2 Section 3 Section 5 Section 6 time
6. Burst mode operation : In order to minimize the power dissipation at standby mode, FS8S0765RCB has a burst mode operation. In burst mode, the FPS reduces the effective switching frequency and output voltage. The FPS enters into burst mode when the voltage of the soft start pin is higher than 3V, no sync signal is applied and the feedback voltage is lower than 1V. During the burst mode operation, Vcc is hysteresis controlled between 11V and 12V. Once the FPS enters into burst mode, it stops switching operation until Vcc drops to 11V. When Vcc reaches 11V, the FPS starts switching with switching frequency of 40kHz and peak MOSFET current of 0.6 A until Vcc reaches 12V. When Vcc reaches 12V, the switching operation is terminated again until Vcc reduces to 11V. Figure 9 shows operating waveforms. The soft start during the initial start-up is shown in the section 1. During this period, there is no external sync signal and the switching frequency is 20kHz. The section 2 represents the normal mode operation. The switching frequency is synchronized with the external sync signal. In the section 3, the external sync signal is removed. However, the load still exists and thus the feedback voltage (Vfb) is higher than 1V. In this period, the FPS does the normal switching operation with switching frequency of 20kHz. The section 4 and 5 show the burst mode operation. At the end of the section 3, the load is eliminated and the feedback voltage (Vfb) drops below 1V forcing the FPS to stop switching operation. During the section 4, Vcc goes down to 11V. During section 5, Vcc is hysteresis controlled between 11V and 12V. When the external sync signal is applied on the pin 5, the FPS resumes its normal operation. In order to minimize the power con-
Figure 9. The operation of the FS8S0765RCB at the normal mode and the off mode
13
FS8S0765RCB
Typical application circuit
1. 80W Universal Input Power Supply For CRT Monitor
T1 1 +2 BD101 C107 10nF/630V 3 + C106 220uF/400V R101 56K/2W 2 3 R103 RT101 C105 R102 100nF Line Filter: LF101 3.3 5 4 3 + D103 C103 4.7nF C102 C104 C108 + 22uF/50V R105 560 ZD101 6.2VZD + R104 2.2K C101 TNR R106 100 C301 F101 FUSE 4.7nF C302 4.7nF 9 2N3904 C109 47nF C111 0.1uF C112 47uF/16V D102 6 IC101 S/S Drain Vfb GND Vcc FS8S0765RCB C110 1uF/50V 7 11 12 D101 4 13 15 16
D201 L201 + C201 22uF/160V D202 + C202 22uF/160V
80V
1
-
14 L202 + C203 47uF/100V D203 L203 + + C205 1000uF/25V C206 1000uF/25V + C204 47uF/100V
4
0
600K
50V
1 2 8 D204
14V
4.7nF C114 100nF 1nF
D205 10 L205 + C209 1000uF/16V + C210 1000uF/16V
0
C113 Sync trans 1uF 1N4148 R201 1 0.1uF Hsync_O DC5V
C115 1nF
2
Micro controller
0
0.1K KSC945
R202 4k 0.7k R203 Off signal
On --> normal mode: Off --> off mode
2. Transformer Schematic Diagram
Lm : 420uH
16 1 Nvo1 : 10T 15 14 Np : 40T Nvo2 : 22T 13 12 Nvo3 : 6T 4 6 Nvcc : 12T Nreg : 3T 7 9 8 Nvo5 : 3T 11 Nvo4 : 5T 10
+
L204 C207 1000uF/25V
C208 1000uF/25V
+
-14V
6.5V
Regulator ouput_5V
14
FS8S0765RCB
3.Winding Specification
No Np1 Nvo1 Nreg Nvo2 Np2 Nvo3 Nvo4 Nvo5 Nvcc Pin (sf) 41 16 15 78 14 13 41 12 9 9 11 10 9 68 Wire 0.3 x 1 0.3 x 1 0.2 x 1 0.3 x 3 0.3 x 1 0.3 x 2 0.3 x 1 0.3 x 2 0.2 x 1
Turns 40 10 3 22 40 6 5 3 12
Winding Method Solenoid Winding Center Winding Solenoid Winding Center Winding Solenoid Winding Solenoid Winding Solenoid Winding Solenoid Winding Solenoid Winding
Insulation: Polyester Tape t = 0.050mm, 2Layers Insulation: Polyester Tape t = 0.050mm, 2Layers Insulation: Polyester Tape t = 0.050mm, 2Layers Insulation: Polyester Tape t = 0.050mm, 2Layers Insulation: Polyester Tape t = 0.050mm, 2Layers Insulation: Polyester Tape t = 0.050mm, 2Layers Insulation: Polyester Tape t = 0.050mm, 2Layers Insulation: Polyester Tape t = 0.050mm, 2Layers Outer Insulation: Polyester Tape t = 0.050mm, 2Layers
4.Electrical Charateristics
Pin Inductance Leakage Inductance 1-4 1-4 Specification 420uH 10% 5uH Max Remarks 300kHz, 1V 2nd all short
5. Core & Bobbin
Core : EER 3540 Bobbin : EER3540 Ae(mm2) : 107
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FS8S0765RCB
6.Demo Circuit Part List
Part F101 RT101 R101 R102 R103 R104 R105 R106 R201 R202 R203 Value Fuse 3A/250V NTC 10D-9 Resistor 56K 3.3 600K 2.2K 0.56K 0.1K 0.1K 4K 0.7K 2W 1/4W 1W 1/4W 1/4W 1/4W 1/4W 1/4W 1/4W Sync trans Inductor L201 ~ L205 13uH Diode D101 Capacitor C101 C102 C103 C104 C105 C106 C107 C108 C109 C110 C111 C112 C113 C114 C115 471D10 100nF 4.7nF 4.7nF 100nF 220uF/400V 10nF/630V 22uF/50V 47nF/50V 1uF/50V 0.1uF/50V 47uF/50V 1uF/50v 1nF/50V 1nF/50V TNR Box Capacitor AC Filter Capacitor AC Filter Capacitor Box Capacitor Electorlytic Capacitor Caramic Capacitor Electorlytic Capacitor Caramic Capacitor Electorlytic Capacitor Caramic Capacitor Electorlytic Capacitor Electorlytic Capacitor Caramic Capacitor Caramic Capacitor IC101 IC201 FS8S0765RC KSC945 LF101 24mH IC (7A, 650V) NPN Transistor BD101 KBL406 Line Filter Bridge Diode D102 D103 D201 D202 D203 D204 D205 UF4007 TVR10G TVR10G UF4007 UF5404 UF5402 UF5402 UF5401 22mH Note Part C201 C202 C203 C204 C205 C206 C207 C208 C209 C210 C211 C301 C302 Value 22nF/160V 22nF/160V 47nF/100V 47nF/100V 1000nF/25V 1000nF/25V 1000nF/25V 1000nF/25V 1000nF/25V 1000nF/25V 0.1uF/50V 4.7nF 4.7nF Note Electorlytic Capacitor Electorlytic Capacitor Electorlytic Capacitor Electorlytic Capacitor Electorlytic Capacitor Electorlytic Capacitor Electorlytic Capacitor Electorlytic Capacitor Electorlytic Capacitor Electorlytic Capacitor Ceramic Capacitor AC Filter Capacitor AC Filter Capacitor
16
FS8S0765RCB
Package Dimensions
TO-220-5L
17
FS8S0765RCB
Package Dimensions (Continued)
TO-220-5L(Forming)
18
FS8S0765RCB
Ordering Information
Product Number FS8S0765RCBTU FS8S0765RCBYDTU
TU : Non Forming Type YDTU : Forming Type
Package TO-220-5L TO-220-5L(Forming)
Marking Code 8S0765RCB
BVdss 650V
Rds(on)Max. 1.6
19
FS8S0765RCB
DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user.
www.fairchildsemi.com 8/25/03 0.0m 001 Stock#DSxxxxxxxx 2003 Fairchild Semiconductor Corporation
2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.

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